C64 I/O Expander
This document is Copyright © Per Olofsson (E-mail: email@example.com) but
may be spread freely as long as no changes are made to this document or the
illustrations that are distributed with it.
You can download this document as plain text together with the schematics
in B/W and colour. Choose from:
In the C64 I/O space (D000-DFFF) there are several unused areas below D800
that are filled with mirror images of the VIC and SID registers. By adding
a bit of logic to the address decoding done by the PLA it's possible to
utilize the address space more efficiently. The modification requires basic
soldering skills and a bit of soldering on the C64 motherboard. Please note
that this will void your warranty :)
|1 ||74LS00 ||Quad 2-input NAND gate
|1 ||74LS138 ||3-line to 8-line decoder/demultiplexer
|sockets, wire and a piece of veroboard
+5 V and ground can be taken from just about anywhere on the motherboard.
The SID chip select signal is on pin 8 and the VIC chip select signal is on
pin 10. A8, A9 and A10 can be taken from the character ROM on pins 23, 22
Out of the decoder you get eight active low chip select signals. The /D0
and /D4 signals should be soldered to the /CS pins on the VIC and the SID,
respectively. If everything worked out OK you now have six free 256 byte
areas in the I/O space.